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| The Papilio Duo - A Spartan 6 FPGA board with 2MB SRAM |
Today, for the first time, I have a working softcore processor running in a FPGA on the Papilio Duo board. It's a J1b Forth cpu which is a 32 bit, minimum instruction set stack processor.
Thanks to James Bowman, the J1 designer at Excamera Labs for supplying the bitfile, of a slightly speed reduced variant that now programs and runs on my newest Papilio Duo Spartan 6 FPGA board.
James has supplied his "SwapForth" that is an ANS compatible Forth - with some extensions to suit the Papilio hardware.
I am still having some beginners teething troubles with Python, so I am running the serial comms using Termite - a Terminal application. It is important to ensure that DTR is set low - otherwise the board is held in reset.
Forth is an interesting language - with an unusual Reverse Polish syntax - that slowly grows on you, the more you use it.
Forth is also a fast executing language - especially on a processor that has been optimised to execute Forth almost as its native machine language.
This build (80MHz) of the J1b can execute 10 million empty DO LOOPs per second and can sum a sequence of 100,000,000 integers in about 23 seconds.
When it comes to toggling an I/O pin under processor control - the J1b can do about 8MHz using it's io! word to toggle the pin.
The J1 is a soft core processor waiting to be discovered. James's SwapForth maks it relatively easy to program.